Technology
Two things had to be invented: a switch that changes state with light, and a family of logic gates built from those switches. The architecture, the fabrication strategy, and the compute centers all follow from what those two do and what they stop doing.
The element
A conventional processor works by pushing electric current through billions of transistors to make them change state. That is what a computation physically is. Every one of those state changes meets resistance, and resistance deposits heat, which is why a modern data center spends a large share of its power and nearly all of its water carrying heat away from the machines that made it.
Dr. Gary Poovey's switch changes state with light. The state change was measured independently at the Technion Israel Institute of Technology by Dr. Alex Bekker using pump-probe spectroscopy, and it takes 150 to 200 femtoseconds. That range came off a test series rather than a single reading, so the range is the value.
Because no current is pushed through a channel to make the state change happen, the switch does not deposit the heat a transistor deposits. Photonic switching solves the heat problem, and so compute can stay here on earth, near the people and the workloads it serves, rather than being sent to orbit or under the ice in search of somewhere cold enough to put it.
Logarithmic · Gold band = independently measured range
The operational regime of a conventional processor — clock period, memory access, the latency a computation actually experiences.
The range came off a test series at the Technion Israel Institute of Technology, measured by pump-probe spectroscopy. A range from a test series is a finding, and the range is the value. This is the only performance figure on this site that has been measured rather than modeled.
The logic
We speak most about the switch, because the switch is what replaces the transistor. Those skilled in the art know that a switch on its own is insufficient to build a computer.
True Photonic holds the intellectual property for an entire Boolean gate family in the optical domain: NAND, OR, XOR, flip-flop, and the rest. Existing logic designs and topologies map across to it rather than being reinvented from scratch. The gate family is Del Wolverton's work.
The outputs of these gates stay in the optical domain, so a signal passes from one stage to the next without being converted back into electrons along the way. Conversion happens at the boundary, where the machine has to talk to an outside device on that device's terms. All of the logic stays in light.
How that is achieved is not in the filings. Some of what makes it work is held as trade secret rather than patented.
The architecture
Logic-in-Light is the architecture built on the gate family: optical gates assembled into photonic processing units, with the first 64-bit demonstrator scheduled for 2026.
Clock frequency in this architecture is a choice we are proving rather than a specification we inherited. A conventional processor buys throughput by raising its clock, and pays for it in heat. We are testing whether a photonic architecture holds its throughput as the clock comes down, which would move the win from speed to energy. Our chief technical officer's position on it is the right one: that is one of the things we will prove.
No production photonic server has been built and metered. Figures describing what such a machine will draw, deliver, or cost are design targets, and we label them that way wherever they appear. The switch is the proven element. Everything downstream of it is engineering with a measurement date attached.
Manufacturing
The industry's answer to demand has been to shrink the transistor, which requires extreme ultraviolet lithography, which requires fabs that cost twenty to thirty billion dollars each and of which a handful exist worldwide.
We fabricate at 90 to 180 nanometers. A switch that changes state in femtoseconds does not need the smallest geometry available, and the strategy that follows is straightforward: fewer switches, the same throughput, less energy, no water.
What that buys is supply chain rather than performance. Capacity at mature nodes is abundant, largely depreciated, distributed across many countries, frequently underutilized, and outside the export controls that govern advanced nodes. It means no allocation queue at a leading-edge foundry, no EUV dependency, a far lower cost of entry into manufacturing, existing underused domestic capacity in the United States, and a credible fabrication path for sovereign partners who want production inside their own borders.
Substrate
Pilot-lot test die run on silicon carriers today, and the Technion measurement was taken on a device that needed no special material to exist. The switch works on silicon.
Our substrate program, developed with Astera Energy, grows graphene on boron nitride on sapphire. That work is optimization rather than dependency: it buys thermal headroom, and the dense three-dimensional stacking that thermal headroom makes possible. It is the difference between a photonic processor that works and one that works at the density our filings describe.
If the substrate program never shipped a wafer, every vertical still has a floor and the physics still holds.
The roadmap
Each stage carries its own claims and its own proof tier. We do not blend figures across columns, and we do not quote a mature-production number against an early-production build.
Proves the switch in an assembled machine, and tests whether throughput holds as the clock comes down. No commercial ratio attaches to this stage.
Under testDeliberately few switches at mature geometry, for a cheap entry into manufacturing. The claim is to match conventional throughput at a fraction of the energy, with no water.
Modeled — the exact numbers come after testingSwitch density increases over time and stacking deepens. This is the only stage where surpassing conventional throughput is the claim.
RoadmapMatching leading-edge throughput at mature geometry, at a fraction of the energy, with zero water, on fabs that already exist and are not export-controlled, takes the market on its own terms. It is also the claim a testbed can settle. What comes after that is upside, and upside costs credibility when it leads.
Our proof standard
Our chief technical officer would rather answer after the testbed measures it. We would rather publish his floor than our ceiling. Every figure we put in front of a counterparty carries the tier it belongs to, and we do not move a number up a tier because a room wants it there.
Intellectual property
The estate covers the switch and gate level, the substrate, relaxed lithography, photonic solar, the photonic internet architecture, hardware-anchored agent trust, inference, micropayment and hash engines, robotics, and the cardiovascular sensing line. We publish technology names rather than application numbers.
The patent estate →